Your 1st Silicon Emergency Service

For FABLESS design houses we offer FIB CIRCUIT EDIT services for rapid verification and electrical debug of 1st Silicon.

Chip Designers and Layout Engineers

FIB circuit edit – for when your 1st Silicon needs a mask change before volume production.

When “1st time right” is not right, choosing the best partner for FIB IC Nano-Surgery is a critical decision for a design manager. It is important to know who you can trust to quickly help you mitigate the serious technical and commercial disruption to your NPI process, and there are many pitfalls to avoid.

You need to know –

Can I have working devices in a few hours or days? – NanoScope specialises in the fastest turnaround times in the Europe and Middle East time zones.

Can I get a high Yield? – Our world beating better than 95% 1st time success rate has been standard since we opened in 2006, and we’ve been doing this longer than anybody – since 1992.

Will I get a yield prediction BEFORE I commit to a fix ? – this is standard for NanoScope based on 28 years of continuous experience.

Can I get an accurate quote BEFORE I commit to a fix ? – this is standard for NanoScope

How can I reduce the risks and get confidence in the process ? – NanoScope offers free consultation on all projects, we work directly with your designers to maximise the fix yield, and reduce the time needed for any fix BEFORE we quote.

What happens if something goes wrong?  – We are happy to review your fixes without cost, and work with your designers to try to identify the fail mode. This could be circuit related, fix related, technology related, test related or just the wrong fix for the problem.

What if the intervention doesn’t fix the problem? – 30% of all fixes specified by designers do not fix the correct electrical problem found. BUT a wrong fix correctly implemented proves that a different metal fix is required – this saves an entire metal fix FAB run, and helps you understand the REAL problem more quickly..

I’ve had bad results/low yield before, why are you different? – We are FIB technologists and we specialise in Semiconductor device Nano-Surgery. These are specific skills required for delivering the best advice and the highest yields. Respect the complexity of the process, and choose your partner based on what they need to know.

Are you value for money? – Do you choose a FIB partner based on a low stated hourly rate? Or because of the model number of their equipment? Do you choose based on convenience, and use the FA lab at your test house? Or your Reliability partner? Maybe you chose a University with a FIB?  If you think about the main activity or the required skillset of any of these choices – then they MUST by definition be self-limiting for yield and value. Any price with a low yield (or NO yield) cannot be good value.

Getting you the right fix for the right problem in the shortest time, is how we add value to your business.

Full process flow

First – Check the structure

Check the package structure, die attach and bonding (using non-destructive X-ray or CSAM inspection). Sometimes interventions are necessary with limited information. It is important to understand how the device is constructed before deciding how to modify it. Die size, orientation, position, bond wire type, bond wire layout, die stacking etc. all need to be known to optimise your opening strategy.

Second – Open the device – economically, while leaving it fully functional

The die surface must be open at the point of intervention(s), giving sufficient access, a clean surface, and without compromising how the device will be tested AFTER the intervention is complete. These steps are defined by 4 things

  1. Structure and materials – There are different approaches for Ceramic, Metal, Hybrid, Plastic, Eco Plastic, Chip and Wire, Globtop, Embedded etc. The Bond wires (and other metal structures) can be opened with high temp. acid if they are acid resistant, if not then a combination of Laser pre-cavitation and low temp. wet chemistry may be the easiest. Ceramics and Metal cans need mechanical processing first. Hybrids may be submerged in Poly-imide. Conformal coatings and solder masks, glob topping and other protections all have different requirements.
  2. Intervention requirements – How much access do we need? are the new tracks long (mm’s) or local (um’s). Does the fix require maximum etching rate differentiation? or deep via filling? if so then gas nozzle access should be optimised. If multiple sites need modification then opening the whole die surface may be the best approach. Is there Poly-imide as well as passivation present?
  3. Post fix testing requirements – how the device will be tested AFTER nano-surgery. If you’re using a socket, then preserving the most package structure for supporting the clamp is essential for easy testing. If you’re re-flowing the chip onto a test board, it may need resealing to protect the fix. WLCSP has different issues again.
  4. Re-sealing – refilling an opening is sometimes required, and materials vary in quality, reactivity with exposed materials (also FIB added materials), cost and curing time.

Third – Design the Fix for best results

Chip designers are not FIB technologists and they don’t construct chips. The limitations and capabilities of FIB plus the nano-surgery process and how to optimise it, plus knowing the structure and behaviour of the materials to be modified, are all required for a success fix. It should yield well, and be economic to implement.

By working with your designers we can advise how to achieve this result. Changing the location, layer and routes of the FIB operations by just a few microns can change a proposed intervention yield by 100% and the costs too. Optimising access to the minimum the number of nodes – avoiding likely failure modes from nearby structures (tiles/capacitors), avoiding materials issues (from copper grains or low K dielectrics) and achieving sufficient contact area for best resistance, can all to be taken into account before work starts.

Forth – Implement the FIX

Processing the devices with all the correct ESD handling protocols, mounting , grounding, FIB work, cleaning, inspection (pre- and post-), shipping and support in the shortest time frame.

The fix must also survive the testing process. If the device is to be heated – then standard Platinum depositions will not survive (it’s only 14% Pt and 86% Hydrocarbon), and solder can short out FIB fixes if not properly protected.

Fifth – Results review and remedial actions

Confirming intervention success, and post intervention handling and testing and any remedial actions or rework are as important as delivering devices on time. If alternative fixes become necessary, these are often needed on an even shorter time frame than before. These are all part of the process of the successful completion of complex interventions on time critical projects. This is how NanoScope ensure you have working devices in a few hours or days, with our >95% success rate.

Tilted view of 2 tracks, cuts and cleanup.Contacts through 2 higher metal layersNano-Surgery DesignMulti Point Probe PadsMulti Layer FixGDSII overlayLong FixBus Change
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