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FIB Circuit Edit: Full process flow

First – Check the structure

Sometimes information is limited, but the device construction defines how we can modify it. We use non-destructive X-ray and/or CSAM to understand the lead frame design, die attach/stacking/size/position/orientation, bondwire type and layout etc. to optimise your opening strategy.

Second – Open the device – economically, while leaving it fully functional

The die surface must be open at the point of intervention(s), giving sufficient access, a clean surface, and without compromising how the device will be tested AFTER the intervention is complete. These steps are defined by 4 things

1. Structure and materials – There are different approaches for Ceramic, Metal, Hybrid, Plastic, Eco Plastic, Chip and Wire, Globtop, Embedded etc. The Bond wires (and other metal structures) can be sensitive to acid and sometimes a laser pre-cavitation step first. Ceramics and Metal cans need mechanical processing.  Conformal coatings and solder masks, glob topping and other protections all have different requirements.
2. Intervention requirements – How much access do we need? are the new FIB tracks long (mm’s) or local (μm’s). Does the fix require maximum gas flux? Closer nozzle approach needs more room. If multiple sites need modification then a full decap may be the best approach.
3. Post fix testing requirements – how will the device be tested AFTER nano-surgery. If you’re using a socket, then preserving the lid for clamping is essential for easy testing. If you’re re-flowing the chip, it may need resealing to protect the fix. WLCSP has different issues again.
4. Re-sealing – refilling an opening is sometimes required, and materials vary in quality, reactivity, cost and curing time.

Third – Optimise the Fix for best results

Chip designers are not FIB technologists and they don’t construct chips. The limitations and capabilities of FIB plus the nano-surgery process and how to optimise it, plus knowing the structure and behaviour of the materials to be modified, are all required for a successful fix. The final version after the FIB circuit edit should yield well, and be economic to implement.

By working with your designers we can advise how to achieve this result. Changing the location, target layers and routes of the FIB operations by just a few microns, can change an intervention yield by 100% and the costs too.

Fourth – Implement the Fix

Processing the devices with the correct ESD handling protocols, mounting , grounding, FIB work, cleaning, inspection (pre- and post), shipping and support in the shortest time frame.

The fix must also survive the testing process. If the device is to be heated – then standard Platinum depositions will not survive (it’s only 14% Pt and 86% Hydrocarbon), and solder can short out FIB fixes if not properly protected.

Fifth – Results review and remedial actions

Confirming intervention success and quickly completing remedial actions or rework are as important as delivering devices on time. If alternative fixes are necessary, these are often needed more rapidly than before. This are all part of a successful process and how NanoScope’s FIB circuit edit service ensures you have working devices in a few hours or days, with our >95% success rate.