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News & Articles

Keep up to date with all the latest NanoScope news and technical articles.

IC Designers – Are you missing a trick?

IC Designers – Are you missing a trick?

by | Nov 13, 2025

A recent statistic from a well known design tool vendor showed that only 14% of new IC layouts were error free at 1st tape out. Hardly “right first time”.
Verification and modelling will only take you so far, especially for ASIC and Analog designs. High metal layer count, shrinking geometries, packaging developments and thermal issues aren’t helping either.

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🚨 We’re exhibiting at Microelectronics UK 2025 this September!

🚨 We’re exhibiting at Microelectronics UK 2025 this September!

by | Sep 5, 2025

🚨 We’re exhibiting at Microelectronics UK 2025 this September!

I hope to see you there- DM me now to book a 1 to 1 chat.

Lets talk about…
– FIB IC Nano-surgery for Chip designers to test and de-risk layout changes.
– Failure Analysis for Silicon, III/V’s, PCB’s and Modules, from boards to gates.
– Environmental/Reliability testing – with CSAM and FA support

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Merry 3D X-ray X-mas from NanoScope Services

Merry 3D X-ray X-mas from NanoScope Services

by | Dec 19, 2024

This X-ray map is of a 3 layer, FIB milled pattern in a 3 layer metal stack (Au, W and Al).
Our Xmas holiday is from 20th Dec to 6th Jan.
As 2024 draws to a close, we wish you a very Merry Christmas and a relaxing break.
For 2025 we hope that your Nano-structures are well formed, your FAB processes well qualified, that your designs are ‘right-first-time’ and failure-free, your packaging and PCBs are reliable and your joints well soldered

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European / Middle East Issue: Winter 2022

European / Middle East Issue: Winter 2022

by | Dec 9, 2022

European / Middle East Issue: Winter 2022 A new IC design FIB Nano-surgery datapoint, our JEDEC MSL Rel-test services and Euros discount. Dear NanoScope Customer, greetings in our first email since COVID. For Silicon DESIGNERS we’ve got a new node success data point, for RELIABILITY Engineers there are new MSL testing services, for EU customers there is our 1€ = 1£ deal, plus NanoScope is growing. First FIB circuit nano-surgery fix to a 7nm node, from the FRONTSIDE.  Our unique expertise has allowed us to successfully modify this advanced 7nm process with 13 metal layers at the M2 level, from the front. The device die was then flipchip packaged and tested with a 65% yield. The benefit for the customer concerned was ‘invaluable’.  Watch out for the upcoming article on this story. Don’t forget to read our 1st article on ‘How to get the most benefit from IC Nano-Surgery” – part 2 coming soon. Launching our low cost MSL testing service for packaged parts for both R&D and production Reliability. All MSL testing is done to JEDEC standards, but now for the first time customers can choose to have a JEDEC CERTIFIED or an UNCERTIFIED test. R&D lots don’t require certification, so why not save 30% on your MSL trials of new packages? Loading a test lot for Temperature Humidity Bias testing (THB) New colleague – supporting accounts, logistics, orders, quality and billing We’re pleased to introduce Janine Stone, who is now managing project administration and compliance at NanoScope, adding much needed bandwidth for our technical offerings. Contact Janine here. Please welcome Janine Stone to the NanoScope team. We’re re-introducing our 1€ = 1£ exchange rate. To help our EU customers during this period of economic chaos, our 1:1 exchange rate adds clarity, security and a 16%... read more
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