News & Articles

Keep up to date with all the latest NanoScope news and technical articles.

Merry Christmas 2023 – It’s been a Quality Year adding these exciting new Capabilities

Closure times – NanoScope is closed from 20th December 2023 to the 5th January 2024 Our big company NEWS is that we are now ISO 9001:2015 Certified In our bid to improve our services on all fronts, we are very proud to have achieved ISO 9001 certification at the end of 2023 – more details to follow. We have already implemented our Quality Management System so you may spot these changes when you use us next. Our NEW microscope this year is a Sonoscan D24 Acoustic Microscope (large area CSAM). this state-of-the-art CSAM is already providing pre- and post- JEDEC Reliability checks for stress testing batches of devices (inc MSL testing) its providing checks for voids in complex planar sandwiches of materials – like polymers and metals it is also used as a Failure Analysis diagnostic tool for on-board packaging as a compliment to our X-ray capability. Our New Technique this year is our Plasma FIB Capability. We can offer ThermoFisher Hydra capabilities to our customers now including Xe for rapid milling of large sections – up to 100’s of μm in size/depth Ar for low kV polishing of (S)TEM sections and FEG SEM for high resolution imaging and Analysis in-situ. Lastly our new Sample Preparation Technique is Mechanical Grinding and Polishing. As boards and modules get smaller and more complex, the boundary between substrate and die requires more advanced investigation, so the need for accurate mechanical sectioning as a starting point for any structural analysis becomes increasingly important. Good Mechanical prep is more often the starting point for a Plasma or Gallium FIB section. (Section of a Section... read more

European / Middle East Issue: Winter 2022

European / Middle East Issue: Winter 2022 A new IC design FIB Nano-surgery datapoint, our JEDEC MSL Rel-test services and Euros discount. Dear NanoScope Customer, greetings in our first email since COVID. For Silicon DESIGNERS we’ve got a new node success data point, for RELIABILITY Engineers there are new MSL testing services, for EU customers there is our 1€ = 1£ deal, plus NanoScope is growing. First FIB circuit nano-surgery fix to a 7nm node, from the FRONTSIDE.  Our unique expertise has allowed us to successfully modify this advanced 7nm process with 13 metal layers at the M2 level, from the front. The device die was then flipchip packaged and tested with a 65% yield. The benefit for the customer concerned was ‘invaluable’.  Watch out for the upcoming article on this story. Don’t forget to read our 1st article on ‘How to get the most benefit from IC Nano-Surgery” – part 2 coming soon. Launching our low cost MSL testing service for packaged parts for both R&D and production Reliability. All MSL testing is done to JEDEC standards, but now for the first time customers can choose to have a JEDEC CERTIFIED or an UNCERTIFIED test. R&D lots don’t require certification, so why not save 30% on your MSL trials of new packages? Loading a test lot for Temperature Humidity Bias testing (THB) New colleague – supporting accounts, logistics, orders, quality and billing We’re pleased to introduce Janine Stone, who is now managing project administration and compliance at NanoScope, adding much needed bandwidth for our technical offerings. Contact Janine here. Please welcome Janine Stone to the NanoScope team. We’re re-introducing our 1€ = 1£ exchange rate. To help our EU customers during this period of economic chaos, our 1:1 exchange rate adds clarity, security and a 16%... read more

How to get the most benefit from FIB IC Nano-surgery?

There are many advantages of correcting an IC design with FIB Nano-Surgery, but sometimes there are also problems, and many designers have been put off the technique. Did your last FIB work as you expected? Or was the yield low? or you got results you couldn’t explain? A quick recap of the reasons to do a FIB edit and how you would go about it, might be helpful. SCENE: So you’ve taped out your big new design, and 4 months and ₤400,000 /$/€ later, your 1st Silicon devices have arrived for tests to start. And immediately, there’s a problem. If you are lucky, then a normal functional test has failed and after a few days of head scratching it becomes clear what the cause is, and what the most likely metal fix should be. If you are unlucky and it’s more subtle, but still a show stopper for customer acceptance, then the fix strategy may be less obvious. Either way, prompt action is required and there are some difficult decisions to make. Your colleagues, customers and suppliers are all waiting to help get your product to market. Then there is the expense and the delays: to testing, to qualification, to sales and to revenue – which all add up to a serious commercial inconvenience. What ARE your options here? Risk a design change because there is a high confidence that the fix is understood? Do you roll the dice (the expensive and time consuming ones) and trust that the fix will work? Or spend a week trying to get a few chips fixed using FIB nano-surgery and give yourself some... read more
Page 1 of 512345

Subscribe to Our Newsletter

Please sign up to be the first to know when we add something new.

Subscribe Today