IC Designers, Failure Analysts and Quality Assurance engineers have a common problem. They need to get into a fabricated IC while keeping it viable and testable.
Applications like FIB Nano-surgery, fault localisation by Thermal/Emission imaging or electrical micro-probing, all need the device to function after the Silicon is exposed.
This means Decapsulation using Acid is more important than ever, but it’s becoming increasingly difficult with shrinking package sizes and Copper bondwires. Old school Jetetch machines just haven’t kept up.
Each lab that offers this has its own unique and hard-won recipes. Ours uses different mixtures of fuming acids, digesters and solvents to clear and clean the die surface without compromising the die attach, bonding, bumps or lead frame. We also vary the temperature to preserve delicate structures and apply Ultrasound too. This all happens AFTER the pre-cavity laser step detailed in my previous post on this topic.
This short clip shows the wet chemistry and ultrasonic steps needed to open the full surface of a die (confidential-pixelated), but even this is not the full story.
How are you going to test it? Or power it up for imaging the failure mode?
Soldering an open device to a test board carries risks from solder and flux damage, and the high temperatures also damage FIB modified devices with a low quality metal deposition (Pt).
The simple answer is to use a socket, but can you still image the die surface once it is closed? And if you have remove the top of the package, will it still fit and make good contact?
Partial decaps, or chip-and-wire type PCB mounting are straight forward ways to get around these issues.
As always it’s important to plan your application through to final test and ensure your decap is compatible before starting. Finding a competent partner able to support and consult on all these options is key to getting good results.
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