In this article I will be discussing why the growth in MEMS development is lagging the growth that was witnessed for IC development in many respects – but highlighting that there are valuable lessons available to accelerate future growth too. Both for design and manufacture there are non-trivial challenges that continue to hinder the growth of this technology in the way IC technology developed.
The emergence of Fabless MEMS design houses as a successful model is only just starting to expand. The promise of successfully mimicking Fabless Chip design houses as a functioning corporate model, has not happened as expected. Fabless growth is limited by many factors such as an absence of standardisation, a diverse range of foundry capabilities, and also that MEMS behavioural modelling is still the poor cousin of IC modelling. Independent MEMS foundries are also struggling to mimic the growth seen by their IC brethren. The lack of standardisation and the variety of FAB processes required to support a broad spectrum of MEMS designs, continues to be a hindrance. Routine volume based profits available from a dial-up/high yield/integrated process are proving elusive. Every MEMS Foundry is offering a different toolset and process book, and yields/costs can still be variable.
Because the range of applications is so diverse, it is difficult to streamline or standardise the manufacturing process for clients supporting different markets. There are no ‘off the shelf’ processes that can be equally applied to devices as varied as a microphone and a gyroscope, and the old adage of ‘1 process/1 product’ is proving to be difficult to overcome.
This situation is further complicated by the introduction of MEMS specific technologies such as integrating thin piezoelectric films, cavity SOI, adding through-silicon vias and new packaging challenges. Less established processes can quickly derail the yields of a reasonably productive process.
All these issues can be overcome with time, investment and standardisation, but the maturity required to establish a set of ground rules, must be based in the economics of volume. Volume brings depth to an organisation – not only financially, but also in terms of expertise and range of tools and techniques. One of the key downstream volume vehicles which was instrumental for the evolution of IC Foundries, was the outsourcing of established products from IC IDM’s. The Foundries were able to engineer lower cost manufacturing solutions for these products, and could benefit from the additional volume this added to their portfolios.
Within the MEMS community however the IDMs have so far proven reluctant to outsource some of their production downstream, and so the volume needed to develop the depth of capability to support ‘most’ MEMS designs under a single roof, remains elusive. Foundries are perversely having to wait instead for the growth in the Fabless design market to fuel their future growth.
The story is not all doom and gloom however. By applying the concepts learned during the growth of IC technology, many stumbling blocks have been avoided and many additional benefits can still be had. Many elements of IC development can still be immediately mimicked to accelerate new product introduction. Several shortcuts are available for both process and design development, and also to match and calibrate new structures to their mathematical models and further streamline new product creation.
Focused Ion Beam (FIB) Circuit Edit (or Design Nano-Surgery) has been widely used for 20 years to help a chip designer verify the exact misbehaviour of a design during verification, and then to trial a design fix prior to incurring the expense and costly delays of implementing a mask change. A fix can be ready in a few hours, and can save months of delays and 10’s of thousands of pounds of costs for fixing even a single minor design mistake.
Silicon Fabs and Foundries (and III/V’s) have also benefited hugely from the ability to accurately qualify processes and correct yield excursions by collecting data from specific locations on a wafer. Process ramps can be shortened and failures analysed in much shorter timelines using FIB as an enabler. The same opportunities are currently available for MEMS designers and process engineers.
The largest MEMS IDM’s are firstly IC manufacturers who have extended their activities into manufacturing MEMS. These companies actively exploit their internal FIB resources for this purpose. Over 50% of the top 30 MEMS manufacturing companies are Chip IDM’s that have a well resourced internal capability in this regard. (ref. Solid State Technology 04/19/2013)
So MEMS Foundries are caught between the technical needs to support a diverse range of processes with low standardisation, and their larger IDM competitors who happily leverage their IC based capabilities, while not sharing the spoils downstream. Even if FIB Nano-Surgery demonstrably offers clear and valuable savings, it is still difficult to reconcile this with the high costs of bringing an expert FIB resource in-house. In this instance direct benefit can be found from lessons already learned in the IC market. Both Fabless IC designers and smaller foundries successfully solved this problem years ago.
Providing ‘as you need it’ access to world class FIB capabilities and consultation, for a reasonable cost and on a short timeline, is the province of FIB service labs. There are many very experienced labs (like NanoScope Services) that can support you with only minor modifications to their IC support techniques. NanoScope is pioneering the use of FIB within the MEMS arena and a few nice examples of how ‘FIB for IC’ has been adapted to ‘FIB for MEMS’ may be found in this applications note here.
Circuit edit has evolved into ‘Structural Edit’ and permits fabricated devices to be incrementally modified to provide working prototypes or pass testing criteria. Functioning devices can then be used as a calibration standard for modelling programs, which in turn can be effectively applied to new designs, without changing the process every time.
Process Analysis and Qualification has evolved into ‘3D Structural Analysis’ and may be used at a variety of resolutions. Simple FIB sections through large structures can be augmented with precision cleaving, sawing or laser dicing to reduce time to result. Overnight milling operations and higher beam currents (including Plasma sources) can extend the size of FIB interventions to include larger MEMS structures and FlipChip access methods can be used to remove significant amounts of Silicon when needed.
The preparation of FIB polished sections for TEM analysis has also evolved. New ways of capturing planar sections and for making and extracting sections from complex materials systems are well understood by the most experienced FIB technologists, and can be applied directly to MEMS structures.
There are other shortcuts available too. Other types of analysis tools are evolving (often with FIB modified functional components) to meet the needs of the MEMS engineer. Tools as diverse as Nano-indenters, customised AFM/MFM/SPM and in-situ dynamic imaging systems are converging on MEMS as an opportunity to themselves evolve beyond the 2D needs-set.
So while we are waiting for the equivalent of an ITRS roadmap or SEMI standard to allow us all to refer to a common set of rules, there will be an exciting and evolving landscape within the MEMS industry. Some techniques are easier to adapt than others and FIB technology falls within this ‘easier’ group. For myself as a FIB technologist, it is this evolution that keeps things interesting, and if only for this reason, I welcome the challenge.
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